Conventional processor environments often include external memory, usually magnetic or optical disk, and faster access local memory, usually RAM. The local memory may be further divided into quicker access SRAM, usually embodied in a cache memory, and main memory, often comprising DRAM. Application software running on such a processor is provided virtual addresses by the operating system to access main memory. The memory management unit (MMU) of the operating system, usually through a paging system, maps virtual memory locations to main memory locations by constructing a page table and page descriptors as is known in the art.
With improvements in processor performance specifications, a need has developed to increase the amount of main memory available to a processor. Typically, a memory increase is achieved by designing a new processor that has a larger virtual memory address space by virtue of a larger virtual address word. For example, the address word length can be expanded from 8 to 16 bits, 16 to 32 bits, or 32 to 64 bits, etc. A disadvantage, however, of pursuing this approach is that designing a new processor is expensive and requires substantial development time.
The amount of available virtual memory space is further constrained by the complexity of new software programs. An example of this constraint involves Microsoft's Windows NT platform and the Intel line of microprocessors including the 486 and Pentium models. These Intel microprocessors have a 32 bit address word which provides a virtual memory address range of up to approximately 4 GB (4,294,967,296 bytes). Windows NT requires 2 GB of this virtual memory address space, leaving only 2 GB for application software. This limitation on available fast access memory, increases the frequency of slower remote memory accesses, thereby degrading overall system performance.